This invention relates generally to the field of integrated circuits. More specifically, the invention relates to a method and apparatus for selecting a state and an option within the selected state using a single program pin.
An integrated circuit (xe2x80x9cICxe2x80x9d) can require input from a user to determine a state of operation or to enable/disable certain features of the integrated circuit. One technique to provide input to the integrated circuit is to use a digital word and provide an external pin for each bit of the digital word. For example, for a two-bit digital word providing four possible states, the IC includes two external pins. Each pin is coupled to a logic high voltage rail (e.g., +3.3. volts, +5 volts) or a logic low voltage rail (e.g., 0 volts, ground reference) to create the digital word corresponding with the desired state. One disadvantage is that the more states the integrated circuit has, the more external pins are needed to implement user selectability. Another technique is to receive the data word serially through a single pin. The problem with this technique is that the integrated circuit must contain complex decoding circuitry and timing information to decode the serial word. Yet another technique is to use an A/D converter to convert various voltages applied to the single pin to various states which correspond to the applied voltages. This technique requires a precise voltage supply external to the integrated circuit to ensure an accurate conversion. Another technique is to use a single pin connected to a timed, sample circuit within the integrated circuit, as shown in U.S. Pat. No. 6,229,385 to Bell et al. This technique uses a single pin for multiple purposes, sampling the pin at certain time intervals to receive state data. In addition to the complex circuitry needed inside the integrated circuit for the sample circuit, this technique also requires a timing circuit to control when the sample circuit reads the control signal. Another technique is to use a single pin connected to a group of specially arranged transistors within the integrated circuit, as shown in U.S. Pat. No. 4,250,407 to Dorey et al. This technique uses an external voltage placed at a point within a xe2x80x9cstep-ladderxe2x80x9d of transistor turn-on voltages to bias a specific number of transistors according to the desired state. The disadvantages with this technique is that the configuration of transistors only allows a predefined set of discrete states that fall within the bias range of the transistor bases and thus doesn""t allow continuous options within a state. The present invention addresses the shortcomings of the above techniques.
It is therefore an object of this invention to use a single pin connected to a connecting element (e.g., any element that allows current flow, such as a wire, a resistor or the like), to select from a plurality of states and a plurality of options within each state. The connecting element is connected to a voltage rail to set the desired state and select the current source that will supply current to the connecting element. Another object of this invention is to keep the circuitry within the integrated circuit simple and flexible.
In one aspect the invention relates to a method of selecting a state from a plurality of states using a program pin. The method includes connecting the program pin to one of a first current source and a second current source, in response to a first voltage applied to the program pin, to thereby generate a second voltage at the program pin, and selecting a state from the plurality of states in response to the first and second voltages. In another embodiment, the method includes applying the first voltage to the program pin. In another embodiment, the method includes determining whether the first voltage exceeds a first reference voltage. In another embodiment, the method includes connecting the program pin to the first current source if the first voltage does not exceed the first reference voltage, and connecting the program pin to the second current source if the first voltage exceeds the first reference voltage.
In another embodiment, the method includes determining if the second voltage exceeds a second reference voltage, and wherein the step of selecting further comprises selecting a state based on the first voltage and the determination of whether the second voltage exceeds the second reference voltage. In another embodiment, the method includes selecting from a group consisting of a state corresponding to a continuous mode and a p-channel high side switch, a state corresponding to a discontinuous mode and the p-channel high side switch, a state corresponding to the continuous mode and a n-channel high side switch, and a state corresponding to the discontinuous mode and the n-channel high side switch. In another embodiment, the method includes converting a switch control signal into a drive signal compatible with one of a p-channel field effect transistor and an n-channel field effect transistor in response to the selection of the state.
In another embodiment, the method includes maintaining a predefined safe mode of operation in response to the selection of the state resulting in operation outside a predefined criterion corresponding to a normal mode of operation. In another embodiment, the method includes controlling a switching regulator based at least in part on the selection of the state. In another embodiment, the switching regulator is a synchronous, DC to DC converter. In another embodiment, the first reference voltage is ground. In another embodiment, the first voltage is substantially equal to the second voltage.
In another aspect the invention relates to method of selecting a state from a plurality of states using a program pin in electrical communication, through a resistor element, to either the first rail or the second rail. The method includes determining from a first voltage at the program pin whether the resistor element is in electrical communication with one of the first rail and the second rail, connecting to one of a first current source and a second current source in response to the first voltage, to thereby generate a second voltage, and selecting one of the plurality of states in response to the first and the second voltages. In another embodiment, the method includes, upon determination that the resistor element is in electrical communication with the first rail, connecting a current sink to the program pin, and upon determination that the resistor element is in electrical communication with the second rail, connecting a current supply to the program pin. In another embodiment, the method includes determining a range of resistance of the connecting element in electrical communication with the program pin in response to the second voltage, the range between a first and a second threshold value, and wherein the step of selecting comprises selecting one of the plurality of states in response to the determined rail and the determined range of resistance.
In another aspect the invention relates to a system for selecting one of a plurality of operating states using a program pin. The system includes a first comparator, a current switch module and a logic module. The first comparator includes a first terminal in communication with the program pin, a second terminal adapted to receive a first reference voltage, and a third terminal, the first comparator generating a first indicator signal in response to a voltage applied at the program pin, the first indicator signal having a first state and a second state. The current switch module includes a first terminal in communication with the third terminal of the first comparator, and a second terminal in communication with the program pin, the current switch module providing a first current at the second terminal of the current switch module if the first indicator signal is in the first state, the current switch module receiving a second current at the second terminal of the current switch module if the first indicator signal is in the second state. The logic module includes a first terminal in communication with the second terminal of the current switch module, a second terminal adapted to receive a second reference voltage, and a third terminal, the logic module generating a second indicator signal in response to a voltage applied at the program pin.
In another embodiment, the current switch module includes a switch, a first current source and a second current source. The switch includes a first terminal, a second terminal, a control terminal and a third terminal, the control terminal in communication with the first terminal of the current switch module and the third terminal in communication with the second terminal of the current switch module. The first current source includes a first terminal adapted to receive a third reference voltage, and a second terminal in communication with the first terminal of the switch, the first current source providing the first current through the switch when the first indicator signal is in the first state. The second current source includes a first terminal adapted to receive a fourth reference voltage, and a second terminal in communication with the second terminal of the switch, the second current source receiving the second current through the switch. In another embodiment, the third reference voltage is a first rail and the fourth reference voltage is a second rail.
In another embodiment, the logic module further includes a fourth terminal, a fifth terminal, a second comparator, a third comparator, a first NOR gate, a second NOR gate and an OR gate. The fourth terminal is adapted to receive a third reference voltage. The fifth terminal is in communication with the third terminal of the first comparator. The second comparator includes a first terminal in communication with the first terminal of the logic module, a second terminal in communication with the second terminal of the logic module, and a third terminal. The third comparator includes a first terminal in communication with the first terminal of the logic module, a second terminal in communication with the fourth terminal of the logic module, and a third terminal. The first NOR gate includes a first terminal in communication with the third terminal of the second comparator, a second terminal in communication with the fifth terminal of the logic module, and a third terminal. The second NOR gate includes a first terminal in communication with the third terminal of the third comparator, an inverting terminal in communication with the fifth terminal of the logic module, and a third terminal. The OR gate includes a first terminal in communication with the third terminal of the first NOR gate, a second terminal in communication with the third terminal of the second NOR gate, and an third terminal in communication with the third terminal of the logic module.
In another embodiment, the system includes an inverter having a first terminal in communication with the third terminal of the first comparator, and a second terminal, the second terminal of the inverter providing a third indicator signal complementary to the first indicator signal. In another embodiment, the first indicator signal corresponds to a type of switch, the first state of the first indicator signal corresponds to a p-channel device and the second state of the first indicator signal corresponds to a n-channel device, the second indicator signal corresponds to a mode of operation and a first state of the second indicator signal corresponds to a continuous mode of operation and a second state of the second indicator signal corresponds to a discontinuous mode of operation. In another embodiment, the first and second currents are substantially constant.
In another aspect the invention relates to a method of selecting a state and an option within the selected state using a program pin. The method includes receiving a programming voltage at the program pin, selecting the state from a plurality of discrete states in response to a comparison between the programming voltage and a first reference voltage, and selecting the option from a plurality of options within the selected state, in response to a comparison between the programming voltage and a second reference voltage. The options can be continuous or discrete. In another embodiment, the method includes conducting current from the program pin in response to the programming voltage being greater than or equal to a third reference voltage, thereby generating a first modified programming voltage, and supplying current to the program pin in response to the programming voltage being less than the third reference voltage, thereby generating a modified programming voltage. In another embodiment, the method includes selecting the option from a plurality of continuous options within the selected state in response to a comparison of one of the first and the second modified programming voltages and the second reference voltage.